Implementation of SOP function using multiplexer

1. Step 1: Draw the truth table for the given number of variable function.
2. Step 2: Consider one variable as input and remaining variables as select lines.
3. Step 3: Form a matrix where input lines of MUX are columns and input variable and its compliment are rows.

2-input Multiplexer Design

1. Q = A.I0.I1 + A.I0.I1 + A.I0.I1 + A.I0.I1
2. Q = A.I1 + A.I0
3. The Boolean expression for this 4-to-1 Multiplexer above with inputs A to D and data select lines a, b is given as:
4. Q = abA + abB + abC + abD.

A Boolean function is a function that has n variables or entries, so it has 2n possible combinations of the variables. These functions will assume only 0 or 1 in its output. An example of a Boolean function is this, f(a,b,c) = a X b + c. These functions are implemented with the logic gates.

If the given expression has n variables, then determine the multiplexer using the formula 2n : 1. Connect the inputs, that correspond to the given minterms to logic 1. Connect all the other inputs to the ground(logic 0). Connect the input variables(P, Q, R) as the selection lines.

SIMPLIFICATION USING BOOLEAN ALGEBRA Example Using Boolean algebra techniques, simplify this expression: AB + A(B + C) + B(B + C) Solution Step 1: Apply the distributive law to the second and third terms in the expression, as follows: AB + AB + AC + BB + BC Step 2: Apply rule 7 (BB = B) to the fourth term.

The inputs, corresponding to the minterms (0, 1, 3, 5, 7) are connected to the logic 1 and remaining terms to the logic 0 (grounded). If the boolean expression has n+1 variables, we take only n variables as the selection line of the multiplexer.

In the given boolean expression, there are 3 variables. We should use 2 3 : 1 = 8 : 1 multiplexer. But as per the question, it is to be implemented with 4 : 1 mux. For 4 : 1 multiplexer, there should be 2 selection lines. So from the given 3 variables, the 2 least significant variables (B, C) are used as selection line inputs.

For 4 : 1 multiplexer, there should be 2 selection lines. So from the given 3 variables, the 2 least significant variables (B, C) are used as selection line inputs. Let us derive the four inputs of 4 : 1 multiplexer using the implementation table.

Shannon’s expansion or the Shannon decomposition is a method by which a Boolean function can be represented by the sum of two sub function of the original. Shannon expansion develops the idea that boolean function can be reduced by means of the identity.

A multiplexer is a combinational circuit that provides single output but accepts multiple data inputs. A demultiplexer is a combinational circuit that takes single input but that input can be directed through multiple outputs. It performs parallel to serial conversion.

The basic function of a multiplexer: combining multiple inputs into a single data stream. On the receiving side, a demultiplexer splits the single data stream into the original multiple signals.

Boolean algebra deals with binary variables and logic operation. A Boolean Function is described by an algebraic expression called Boolean expression which consists of binary variables, the constants 0 and 1, and the logic operation symbols.

The implementation of Boolean functions by using logic gates involves connecting output of one logic gate to the input of another gate. Commonly used Logic Gates are: AND, OR, NAND and NOR gates. Let’s have a look into the logic gate implementation of SOP and POS forms of Boolean functions.

The multiplexer is used to improve the efficiency of the communication system using transmission data like transmission of audio as well as video. Demultiplexer gets the o/p signals from the Mux & changed them to the unique form at the end of the receiver.

Demultiplexer is used to connect a single source to multiple destinations. Demultiplexer are also used for reconstruction of parallel data and ALU circuits. Communication System – Communication system use multiplexer to carry multiple data like audio, video and other form of data using a single line for transmission.

Combinational logic design using Multiplexer provide many advantages like reduction of IC package count, simplified logic design, no requirement of logic expression simplification in the circuit etc. Solution: Following are the steps to implement the given Boolean Function using 8:1 MUX: